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FUJITSU SEMICONDUCTOR DATA SHEET
DS04-27402-5E
ASSP
BIPOLAR
POWER-VOLTAGE MONITORING IC WITH WATCHDOG TIMER
MB3793-42
DESCRIPTION
The MB3793 is an integrated circuit to monitor power voltage; it incorporates a watchdog timer. A reset signal is output when the power is cut or falls abruptly. When the power recovers normally after resetting, a power-on reset signal is output to microprocessor units (MPUs). An internal watchdog timer with two inputs for system operation diagnosis can provide a fail-safe function for various application systems. There is also a mask option that can detect voltages of 4.9 to 2.4V in 0.1-V steps. The model number and package code are as shown below. Model No. MB3793-42 Marking Code 3793-A Detection voltage 4.2 V
FEATURES
* * * * * * * * Precise detection of power voltage fall: 2.5% Detection voltage with hysteresis Low power dispersion: ICC = 27 A (reference) Internal dual-input watchdog timer Watchdog timer halt function (by inhibition terminal) Independently-set watchdog and reset times Mask option for detection voltage (4.9 to 2.4 V, 0.1-V steps) Two types of packages (SOP-8pin : 2 types)
APPLICATION
* Arcade Amusement etc.
Copyright(c)1995-2006 FUJITSU LIMITED All rights reserved
MB3793-42
PIN ASSIGNMENT
(TOP VIEW)
1 2 3 4 8 7 6 5 CK1 CK2 INH VCC
RESET CTW CTP GND
(FPT-8P-M01) (FPT-8P-M02)
PIN DESCRIPTION
Pin No. 1 2 3 4 Symbol RESET CTW CTP GND Description Outputs reset Sets monitoring time Sets power-on reset hold time Ground Pin No. 5 6 7 8 Symbol VCC INH CK2 CK1 Description Power supply Inhibits watchdog timer function Inputs clock 2 Inputs clock 1
2
MB3793-42
BLOCK DIAGRAM
To VCC of all blocks
I1 3 A I2 30 A
5
VCC
CTP
3
Q
S R1 590 k
Output buffer
Comp. O
+
RSFF2 Q R
RESET
1
-
Q
S
RSFF1 Q INH 6 R
Comp. S CTW 2
Watchdog timer Pulse generator 1
Reference voltage generator
VREF 1.24 V
- +
VS
CK1
8
R2 240 k
Pulse generator 2
CK2 7
To GND of all blocks
4
GND
3
MB3793-42
BLOCK FUNCTIONS
1. Comp. S
Comp. S is a comparator with hysteresis to compare the reference voltage with a voltage (VS) that is the result of dividing the power voltage (VCC) by resistors R1 and R2. When VS falls below 1.24 V, a reset signal is output. This function enables the MB3793 to detect an abnormality within 1 s when the power is cut or falls abruptly.
2. Comp. O
Comp. O is a comparator to control the reset signal (RESET) output and compares the threshold voltage with the voltage at the CTP terminal for setting the power-on reset hold time. When the voltage at the CTP terminal exceeds the threshold voltage, resetting is canceled.
3. Reset output buffer
Since the reset (RESET) output buffer has CMOS organization, no pull-up resistor is needed.
4. Pulse generator
The pulse generator generates pulses when the voltage at the CK1 and CK2 input clock terminals changes to High from Low level (positive-edge trigger) and exceeds the threshold voltage; it sends the clock signal to the watchdog timer.
5. Watchdog timer
The watchdog timer can monitor two clock pulses. Short-circuit the CK1 and CK2 clock terminals to monitor a single clock pulse.
6. Inhibition terminal
The inhibition (INH) terminal forces the watchdog timer on/off. When this terminal is High level, the watchdog timer is stopped.
7. Flip-flop circuit
The flip-flop circuit RSFF1 controls charging and discharging of the power-on reset hold time setting capacity (CTP). The flip-flop circuit RSFF2 switches the charging accelerator for charging CTP during resetting on/off. This circuit only functions during resetting and does not function at power-on reset.
4
MB3793-42
ABSOLUTE MAXIMUM RATINGS
Parameter Power voltage* CK1 Input voltage* CK2 INH Reset output voltage (direct current) RESET Symbol VCC VCK1 VCK2 VINH IOL IOH PD Tstg -10 -55 +10 200 +125 mA mW C -0.3 +7 V Rating Min -0.3 Max +7 Unit V
Power dissipation (Ta +85C) Storage temperature
*: The power voltage is based on the ground voltage (0 V). WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current, temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.
RECOMMENDED OPERATING CONDITIONS
Parameter Power supply voltage Reset (RESET) output current Power-on reset hold time setting capacity Watchdog timer monitoring time setting capacity Watchdog timer monitoring time Operating ambient temperature Symbol VCC IOL IOH CTP CTW tWD Ta Value Min 1.2 -5 0.001 0.001 0.1 -40 Typ 5.0 0.1 0.1 +25 Max 6.0 +5 10 1 1500 +85 Unit V mA F F ms C
WARNING: The recommended operating conditions are required in order to ensure the normal operation of the semiconductor device. All of the device's electrical characteristics are warranted when the device is operated within these ranges. Always use semiconductor devices within their recommended operating condition ranges. Operation outside these ranges may adversely affect reliability and could result in device failure. No warranty is made with respect to uses, operating conditions, or combinations not represented on the data sheet. Users considering application outside the listed conditions are advised to contact their FUJITSU representatives beforehand.
5
MB3793-42
ELECTRICAL CHARACTERISTICS
1. DC Characteristics
(VCC = +5 V, Ta = +25C) Value Parameter Symbol ICC1 Power current ICC2 VSL Detection voltage VSH Detection voltage hysteresis difference CK input threshold voltage VCIL CK input hysteresis INH input voltage VIIL Input current (CK1,CK2,INH) Reset output voltage VOL Reset-output minimum power voltage VCCL IIH IIL VOH VCK = VCC VCK = 0 V IRESET = -5 mA IRESET = +5 mA IRESET = +50 A VCHYS VIIH VCC rising Watchdog timer halt*2 VCC falling Ta = +25C Ta = -40 to +85C Ta = +25C Ta = -40 to +85C Conditions Min Watchdog timer operation*1 4.10 4.05 4.20 4.15 50 (1.4) (0.8) (0.4) 3.5 0 -1.0 4.5 Typ 27 25 4.20 4.20 4.30 4.30 100 1.9 1.3 0.6 0 0 0 4.75 0.12 0.8 Max 50 45 4.30 V 4.35 4.40 V 4.45 150 (2.5) (1.8) (0.8) VCC 0.8 1.0 0.4 1.2 mV V V V V V A A V V V A Unit
VSHYS VCIH
VSH - VSL
*1: At clock input terminals CK1 and CK2, the pulse input frequency is 1 kHz and the pulse amplitude is 0 V to VCC. *2: Inhibition input is at High level.
6
MB3793-42
2. AC Characteristics
(VCC = +5 V, Ta = +25C) Parameter Power-on reset hold time Watchdog timer monitoring time Watchdog timer reset time CK input pulse duration CK input pulse cycle Reset (RESET) output transition time Rising Falling Symbol tPR tWD tWR tCKW tCKT tr* tf* Conditions CTP = 0.1 F CTW = 0.01 F CTP = 0.1 F CTP = 0.1 F CL = 50 pF CL = 50 pF Value Min 80 7.5 5 500 20 Typ 130 15 10 Max 180 22.5 15 500 500 Unit ms ms ms ns s ns ns
*: The voltage range is 10% to 90% at testing the reset output transition time.
7
MB3793-42
TIMING DIAGRAM
1. Basic operation (Positive clock pulse)
VSH VSL
VCC
VCCL tCKW
CK1
CK2
INH
Vth
CTP
VH
CTW
VL
RESET
tPR
tWD
tWR
tPR
(1) (2)
(3) (4) (5) (5)
(6) (7)
(8) (9)
(10)
(11)
(12)
(13) (14)
8
MB3793-42
2. Basic operation (Negative clock pulse)
VSH VSL
VCC
VCCL tCKW
CK1
CK2
INH
Vth
CTP
VH
CTW
VL
RESET
tPR
tWD
tWR
tPR
(1) (2)
(3) (4) (5) (5)
(6) (7)
(8) (9)
(10)
(11)
(12)
(13) (14)
9
MB3793-42
3. Single-clock input monitoring (Positive clock pulse)
tCKW
CK1 CK2
tCKT
Vth
CTP
VH
CTW
VL
RESET
tWD
tWR
Note: The MB3793 can monitor only one clock. The MB3793 checks the clock signal at every other input pulse. Therefore, set watchdog timer monitor time tWD to the time that allows the MB3793 to monitor the period twice as long as the input clock pulse.
10
MB3793-42
4. Inhibition operation (Positive clock pulse)
VSH VSL
VCC
VCCL tCKW
CK1
CK2
INH
Vth
CTP
VH
CTW
VL
RESET
tPR
tWD
tWR
tPR
(1) (2)
(3) (4) (5) (5)
(6) (7)
(8) (9) (10)
(11)
(12)
(13) (14)
11
MB3793-42
5. Clock pulse input (Positive clock pulse)
*1
CK1
CK2
*2
VH
CTW
VL
Note: The MB3793 watchdog timer monitors Clock 1 (CK1) and Clock 2 (CK2) pulses alternately. When a CK2 pulse is detected after detecting a CK1 pulse, the monitoring time setting capacity (CTW) switches to charging from discharging. When two consecutive pulses occur on one side of this alternation before switching, the second pulse is ignored. In the above figure, pulses *1 and *2 are ignored.
6. Inhibition input rising and falling time
VCC 90 % INH 10 % tri tfi 10 % 0V 90 %
12
MB3793-42
OPERATION SEQUENCE
The operation sequence is explained by using " TIMING DIAGRAM 1. Basic operation (Positive clock pulse)". The following item numbers correspond to the numbers in " TIMING DIAGRAM 1. Basic operation (Positive clock pulse)". (1) When the power voltage (VCC) reaches about 0.8 V (VCCL), a reset signal is output. (2) When VCC exceeds the rising-edge detection voltage (VSH), charging of power-on reset hold time setting capacitance (CTP) is started. VSH is about 4.3 V. (3) When the voltage at the CTP terminal setting the power-on reset hold time exceeds the threshold voltage (Vth), resetting is canceled and the voltage at the RESET terminal changes to High level to start charging of the watchdog timer monitoring time setting capacitance (CTW). Vth is about 3.6 V. The power-on reset hold time (tPR) can be calculated by the following equation. tPR (ms) A x CTP (F) Where, A is about 1300. (4) When the voltage at the CTW terminal setting the monitoring time reaches High level (VH), CTW switches to discharging from charging. VH is about 1.24 V (reference value). (5) When clock pulses are input to the CK2 terminal during CTW discharging after clock pulses are input to the CK1 terminal--positive-edge trigger, CTW switches to charging. (6) If clock pulse input does not occur at either the CK1 or CK2 clock terminals during the watchdog timer monitoring time (tWD), the CTW voltage falls below Low level (VL), a reset signal is output, and the voltage at the RESET terminal changes to Low level. VL is about 0.24 V. tWD can be calculated from the following equation. tWD (ms) B x CTW (F) + C x CTP (F) Where, B is about 1500. C is about 3; it is much smaller than B. Hence, when CTP / CTW 10, the calculation can be simplified as follows: tWD (ms) B x CTW (F) (7) When the voltage of the CTP terminal exceeds Vth again as a result of recharging CTP resetting is canceled , and the watchdog timer restarts monitoring. The watchdog timer reset time (tWR) can be calculated by the following equation. tWR (ms) D x CTP (F) Where, D is about 100. (8) When VCC falls below the rising-edge detection voltage (VSL), the voltage of the CTP terminal falls and a reset signal is output, and the voltage at the RESET terminal changes to Low level. VSL is about 4.2 V. (9) When VCC exceeds VSH, CTP begins charging. (10)When the voltage of the CTP terminal exceeds Vth, resetting is canceled and the watchdog timer restarts. (11)When an inhibition signal is input (INH terminal is High level), the watchdog timer is halted forcibly. In this case, VCC monitoring is continued without the watchdog timer. The watchdog timer does not function unless this inhibition input is canceled. (12)When the inhibition input is canceled (INH terminal is Low level), the watchdog timer restarts. (13)When the VCC voltage falls below VSL after power-off, a reset signal is output. (14)When the power voltage (VCC) falls below about 0.8 V (VCCL) , a reset signal is released. Similar operation is also performed for negative clock-pulse input (" TIMING DIAGRAM 2. Basic operation (Negative clock pulse)"). Short-circuit the clock terminals CK1 and CK2 to monitor a single clock. The basic operation is the same but the clock pulses are monitored at every other pulse ( TIMING Diagram 3. Single-clock input monitoring).
13
MB3793-42
TYPICAL CHARACTERISTICS
Power Current - Power Voltage
40 35 30
Detection Voltage - Operating ambient Temperature
4.5
Watchdog timer monitoring
(VINH = 0 V)
25 20 15 10
Detection voltage VSH and VSL (V)
4.4
Power current ICC (A)
Watchdog timer stopping (VINH = VCC)
VSH 4.3
Reset
(VCC < VSH)
Inhibited
VSL 4.2
MB3793-42
f = 1 kHz Duty = 10% VL = 0 V VH = VCC
VINH VCC 4.1 CTP CTW 0.01 F 0.1 F 4.0 -40 -20 0 +20 +40 +60 +80 +100
0
1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0 10
Power voltage VCC (V) Reset Output Voltage - Reset Output Current (P-MOS side)
Operating ambient temperature Ta (C) Reset Output Voltage - Reset Output Current (N-MOS side)
5.0
Ta = -40 C
500
Reset output voltage V RESET (V)
4.9 4.8 4.7 4.6 4.5 4.4 4.3 4.2 4.1 4.0 0 Ta = +85 C
Reset output voltage V RESET (mV)
Ta = +25 C
400
Ta VRESET RON IRESET -40 C 98 mV 19.6 +25 C 135 mV 27 +5 mA +85 C 167 mV 33.4
300 Ta = +85 C
Ta = +25 C
200
Ta VRESET RON IRESET -40 C 4.800 V 40 +25 C 4.750 V 50 -5 mA +85 C 4.707 V 58.6
100 Ta = -40 C 0 0 1 2 3 4 5 6 7 8 9 10
-1 -2 -3 -4 -5 -6 -7
-8 -9 -10
Reset output current I RESET (mA)
Reset output current I RESET(mA) (Continued)
14
MB3793-42
Reset Output Voltage - Power Voltage
7
Pull-up resistance: 100 k
Reset-on Reset Time - Operating ambient temperature (when VCC rising)
260 240 220
6
Reset output voltage VRESET (V)
5 4 3 2 Ta = +25 C 1 Ta = -40 C 0 0 1 2 3 4 5 6 7
200
Power-on reset time tPR (ms)
180 160 140 120 100 80 60 40 20 0 -40 -20 0 +20 +40 +60 +80 +100
Ta = +85 C
Power voltage VCC (V)
Operating ambient temperature Ta (C)
Watchdog Timer Monitoring Reset Time - Operating ambient temperature (when monitoring)
26 24
Watchdog Timer Monitoring Time Operating ambient temperature
26 24 22
Watchdog timer monitoring reset time tWR (ms)
Watchdog timer monitoring time tWD (ms)
22 20 18 16 14 12 10 8 6 4 2 0 -40 -20 0 +20 +40 +60 +80 +100
20 18 16 14 12 10 8 6 4 2 0 -40 -20 0 +20 +40 +60 +80 +100
Operating ambient temperature Ta (C)
Operating ambient temperature Ta (C) (Continued)
15
MB3793-42
(Continued)
Power-on Reset Hold Time - CTP Capacitance Reset Time - CTP Capacitance
Power-on reset hold time tPR (ms)
104 103 102 Ta = +25 C 101 1 10 -1 10-4 Ta = +85 C
103 102
Reset Time tWR (ms)
Ta = -40 C
Ta = -40 C 101 1 10-1 10-2 10-4
Ta = +25 C Ta = +85 C
10-3
10-2
10-1
1
101
102
10-3
10-2
10-1
1
101
102
Power-on reset time setting capacitance CTP (F)
Power-on reset time setting capacitance CTP (F)
Watchdog Timer Monitoring Time - CTW Capacitance (under Ta condition) Watchdog timer monitoring time tWD (ms) Watchdog timer monitoring time tWD (ms)
Watchdog Timer Monitoring Time CTW Capacitance
104
103 102
Ta = -40 C Ta = +25 C
103 CTP = 1 F 102 CTP = 0.1 F 101 1 10-1 CTP = 0.01 F 10-5 10-4 10-3 10-2 10-1 1 101
101 1 10-1
Ta = +85 C
10-5
10-4
10-3
10-2
10-1
1
101
Watchdog timer monitoring time setting capacitance CTW (F)
Watchdog timer monitoring time setting capacitance CTW (F)
16
MB3793-42
STANDARD CONNECTION
VCC
5 VCC RESET 2 3 CTW 1
MB3793
CTP CK1 8 CTW CTP
RESET VCC CK
RESET VCC CK
Microprocessor 1
GND
Microprocessor 2
GND
INH 6
GND 4
CK2 7
Equation of time-setting capacitances (CTP and CTW) and set time tPR (ms) A x CTP (F) tWD (ms) B x CTW (F) + C x CTP (F) However, when CTP/CTW 10, tWD (ms) B x CTW (F) tWR (ms) D x CTP (F) Value of A, B, C and D A 1300 B 1500 C 3 D 100 Remark
(Example) When CTP = 0.1 F and CTW = 0.01 F, tPR 130 [ms] tWD 15 [ms] tWR 10 [ms]
17
MB3793-42
APPLICATION EXAMPLE
1. Monitoring Single Clock
VCC
5 VCC RESET 1 2 CTW
MB3793
3 CTP CK1 8 CTW CTP
RESET VCC
Microprocessor
CK
GND INH 6 GND 4 CK2 7
2. Watchdog Timer Stopping
VCC
5 VCC 6 INH 2 CTW RESET 1
MB3793
3 CTP CK1 8 CTW CTP
RESET VCC CK
RESET VCC CK
Microprocessor1
HALT GND
Microprocessor2
HALT GND
GND 4
CK2 7
18
MB3793-42
NOTES ON USE
* Take account of common impedance when designing the earth line on a printed wiring board. * Take measures against static electricity. - For semiconductors, use antistatic or conductive containers. - When storing or carrying a printed circuit board after chip mounting, put it in a conductive bag or container. - The work table, tools and measuring instruments must be grounded. - The worker must put on a grounding device containing 250 k to 1 M resistors in series. * Do not apply a negative voltage - Applying a negative voltage of -0.3 V or less to an LSI may generate a parasitic transistor, resulting in malfunction.
ORDERING INFORMATION
Part number MB3793-42PF- MB3793-42PNF- MB3793-42PF-E1 MB3793-42PNF-E1 Package 8-pin plastic SOP (FPT-8P-M01) 8-pin plastic SOP (FPT-8P-M02) 8-pin plastic SOP (FPT-8P-M01) 8-pin plastic SOP (FPT-8P-M02) Remarks Conventional version Conventional version Lead Free version Lead Free version
RoHS Compliance Information of Lead (Pb) Free version
The LSI products of Fujitsu with "E1" are compliant with RoHS Directive , and has observed the standard of lead, cadmium, mercury, Hexavalent chromium, polybrominated biphenyls (PBB) , and polybrominated diphenyl ethers (PBDE) . The product that conforms to this standard is added "E1" at the end of the part number.
19
MB3793-42
MARKING FORMAT (Lead Free version)
Lead Free version
3793-A
E1XXXX
XXX
INDEX
SOP-8 (FPT-8P-M01)
Lead Free version
3793-A
XXXX E1 XXX
SOP-8 (FPT-8P-M02)
20
MB3793-42
LABELING SAMPLE (Lead free version)
lead-free mark JEITA logo JEDEC logo
MB123456P - 789 - GE1
(3N) 1MB123456P-789-GE1 1000
G
Pb
(3N)2 1561190005 107210
QC PASS
PCS 1,000 MB123456P - 789 - GE1
2006/03/01
ASSEMBLED IN JAPAN
1/1
MB123456P - 789 - GE1
0605 - Z01A 1000
1561190005
Lead Free version
21
MB3793-42
MB3793-42PF-E1, MB3793-42PNF-E1 RECOMMENDED CONDITIONS OF MOISTURE SENSITIVITY LEVEL
Item Mounting Method Mounting times Before opening Storage period From opening to the 2nd reflow When the storage period after opening was exceeded Storage conditions Condition IR (infrared reflow) , Manual soldering (partial heating method) 2 times Please use it within two years after Manufacture. Less than 8 days Please processes within 8 days after baking (125 C, 24H)
5 C to 30 C, 70%RH or less (the lowest possible humidity)
[Temperature Profile for FJ Standard IR Reflow] (1) IR (infrared reflow)
260 C 255 C
H rank : 260 C Max
170 C to 190 C
RT
(b)
(c)
(d)
(e)
(a)
(d')
(a) Temperature Increase gradient (b) Preliminary heating (c) Temperature Increase gradient (d) Actual heating (d')
(e) Cooling
: Average 1 C/s to 4 C/s : Temperature 170 C to 190 C, 60s to 180s : Average 1 C/s to 4 C/s : Temperature 260 C Max; 255 C or more, 10s or less : Temperature 230 C or more, 40s or less or Temperature 225 C or more, 60s or less or Temperature 220 C or more, 80s or less : Natural cooling or forced cooling
Note : Temperature : the top of the package body (2) Manual soldering (partial heating method) Conditions : Temperature 400 C Max Times : 5 s max/pin 22
MB3793-42
PACKAGE DIMENSIONS
8-pin plastic SOP Lead pitch Package width x package length Lead shape Sealing method Mounting height Weight 1.27 mm 5.3 x 6.35 mm Gullwing Plastic mold 2.25 mm MAX 0.10 g P-SOP8-5.3x6.35-1.27
(FPT-8P-M01)
Code (Reference)
8-pin plastic SOP (FPT-8P-M01)
*1 6.35 -0.20 .250 -.008
8
+0.25 +.010
Note 1) *1 : These dimensions include resin protrusion. Note 2) *2 : These dimensions do not include resin protrusion. Note 3) Pins width and pins thickness include plating thickness. Note 4) Pins width do not include tie bar cutting remainder.
0.17 -0.04 .007 -.002
+0.03 +.001
5
INDEX
*2 5.300.30 7.800.40 (.209.012) (.307.016)
Details of "A" part 2.00 -0.15
+0.25 +.010
.079 -.006
1 4
(Mounting height)
"A" 0.13(.005)
0.25(.010) 0~8
1.27(.050)
0.470.08 (.019.003)
M
0.500.20 (.020.008) 0.600.15 (.024.006)
0.10 -0.05
+0.10 +.004
.004 -.002 (Stand off)
0.10(.004)
C
2002 FUJITSU LIMITED F08002S-c-6-7
Dimensions in mm (inches). Note: The values in parentheses are reference values.
(Continued)
23
MB3793-42
(Continued)
8-pin plastic SOP
Lead pitch Package width x package length Lead shape Sealing method Mounting height Weight
1.27 mm 3.9 x 5.05 mm Gullwing Plastic mold 1.75 mm MAX 0.06 g
(FPT-8P-M02)
8-pin plastic SOP (FPT-8P-M02)
Note 1) *1 : These dimensions include resin protrusion. Note 2) *2 : These dimensions do not include resin protrusion. Note 3) Pins width and pins thickness include plating thickness. Note 4) Pins width do not include tie bar cutting remainder.
+.010
*1 5.05 -0.20 .199 -.008
8
+0.25
0.22 -0.07 .009 -.003
5
+0.03 +.001
*2 3.900.30 6.000.40 (.154.012) (.236.016)
Details of "A" part 45 1.550.20 (Mounting height) (.061.008) 0.25(.010)
0.40(.016)
1 4
"A"
0~8
1.27(.050)
0.440.08 (.017.003)
0.13(.005)
M
0.500.20 (.020.008) 0.600.15 (.024.006)
0.150.10 (.006.004) (Stand off)
0.10(.004)
C
2002 FUJITSU LIMITED F08004S-c-4-7
Dimensions in mm (inches). Note: The values in parentheses are reference values.
24
MB3793-42
FUJITSU LIMITED
All Rights Reserved. The contents of this document are subject to change without notice. Customers are advised to consult with FUJITSU sales representatives before ordering. The information, such as descriptions of function and application circuit examples, in this document are presented solely for the purpose of reference to show examples of operations and uses of Fujitsu semiconductor device; Fujitsu does not warrant proper operation of the device with respect to use based on such information. When you develop equipment incorporating the device based on such information, you must assume any responsibility arising out of such use of the information. Fujitsu assumes no liability for any damages whatsoever arising out of the use of the information. Any information in this document, including descriptions of function and schematic diagrams, shall not be construed as license of the use or exercise of any intellectual property right, such as patent right or copyright, or any other right of Fujitsu or any third party or does Fujitsu warrant non-infringement of any third-party's intellectual property right or other right by using such information. Fujitsu assumes no liability for any infringement of the intellectual property rights or other rights of third parties which would result from the use of information contained herein. The products described in this document are designed, developed and manufactured as contemplated for general use, including without limitation, ordinary industrial use, general office use, personal use, and household use, but are not designed, developed and manufactured as contemplated (1) for use accompanying fatal risks or dangers that, unless extremely high safety is secured, could have a serious effect to the public, and could lead directly to death, personal injury, severe physical damage or other loss (i.e., nuclear reaction control in nuclear facility, aircraft flight control, air traffic control, mass transport control, medical life support system, missile launch control in weapon system), or (2) for use requiring extremely high reliability (i.e., submersible repeater and artificial satellite). Please note that Fujitsu will not be liable against you and/or any third party for any claims or damages arising in connection with above-mentioned uses of the products. Any semiconductor devices have an inherent chance of failure. You must protect against injury, damage or loss from such failures by incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of over-current levels and other abnormal operating conditions. If any products described in this document represent goods or technologies subject to certain restrictions on export under the Foreign Exchange and Foreign Trade Law of Japan, the prior authorization by Japanese government will be required for export of those products from Japan. Edited Business Promotion Dept.
F0605

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